In-memory computing description
With the development of Internet, social media, IoT and cloud computing technology, the amount of data in the world has increased dramatically, and the emerging information technology and application patterns have emerged in large number. In addition, human society has begun to move forward into the era of big data. However, the information and knowledge being contained in big data has the characteristics including the low value density, irregular distribution, deep information hiding and difficulty in value discovery. With the increasing amount of data, more and more types of data is coming, the value of the density is getting lower and lower. How to achieve rapid processing of large data has become an urgent problem to be solved. In recent years, memory technology (especially non-volatile memory) of the rapid development, we have made big data may be completely (or most) stored in memory to avoid high latency disk access. How to balance computing, storage and communication in the framework of memory computing is a key problem to be solved.
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Project Title
Natural Science Foundation of China (No. F020302)
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Project Introduction
In the framework of in-memory computing, on the one hand a lot of works from the software have given a lot of optimizations and the formation of a large number of systems for the production environment, such as Spark and Flink, etc. However, there are few studies that directly support in-memory computing models from the computing architecture layer. We consider that computing, storage and communication have very complex interference. The storage of big data from disk to memory will have a very complex and subtle impact on computing and communication. If only the storage is optimized and the calculation and communication are not optimized according to the change of the storage level, the overall speed of the big data processing cannot be improved significantly. Specifically, in-memory computing for big data is faced with three major challenges: (1) single-node storage capacity is small, (2) high real-time computing requirements, (3) high frequency of communication. In summary, in-memory computing such as the above often hinders the full performance.

We study in-memory computing model, and re-design the hardware computing platform for big data. Through data-driven, we dynamically remodel in-memory computing structure, storage structure and communication structure. Specifically, in terms of computations, we propose a common application (such as machine learning, data mining, and database) that can be used to speed up in-memory computing for big data, and can significantly reduce computations in the face of various types of data. In terms of the delay in storage layer, we propose a heterogeneous storage unified access architecture. Different types of data can be targeted to different storage media can be unified access. In communication, we propose a key-value pair communication theory that supports the dynamic regulation of interconnect routing and interconnect topology. Supplemented by specialized system programming and platform management methods, data-driven plastic architecture can effectively deal with in-memory computing when single node storage capacity is small. In addition, in this scenario with high real-time computing and frequent communication characteristics, our architecture can give full play to the performance advantages of in-memory computing.

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Research work
  • Reshapable accelerator architecture
  • Large-scale in-memory computing has some disadvantages: (1) small storage capacity in single node, (2) high real-time computing performance, and (3) frequent communication. They often hinder the performance of in-memory computing. The solution to these problems requires innovation in the computer architecture. In view of the diversity of Big Data, we cannot design the custom hardware architecture one by one for each type of different data (e.g., applications, scenarios). We need to propose a theory of hardware plasticity, based on this theory to develop a few accelerated cores, which can make it no longer associated with specific data and both high efficiency and scalability. According to the data calculation and placement modes, we aims to explore a new type of data-driven plastic in-memory computing architecture, and reshape the computer architecture and system software. We hope that the new architecture can improve the large-scale in-memory performance by the order of magnitude.
  • Unified access architecture for heterogeneous storage
  • According to the characteristics that various storage media exist in large-scale in-memory storage, we aim to explore how to implement the unified access architecture of the heterogeneous storage which is to integrate different types of data. In details, our innovations include heterogeneous storage architecture based on new storage components and the file system based on the new storage architecture and data management system based on based on the new storage architecture. Finally, we will build a high-performance data storage system and high-performance high-expansion data management system. In details, PCM is a storage-level memory with large-scale application prospects in the emerging storage media, so that in this project we will also use PCM to build an important part of the storage architecture for in-memory computing.
  • In-memory communication based on key-value pairs
  • For this, we hope to have ability to build a set of multi-node communication methods for the data-driven memory computing platform. This method, based on key-value pairs, can provide the support for the data-driven interconnection routing and the dynamic adjustment of the interconnection topology. In addition, it also integrates computing, memory, IO and other resources to complete the calculation and communication tasks. The difficulty of communication optimization theory for in-memory computing is how to abstract and unify the communication mode between different modes, which can be divided into batch computing, iterative computing, stream computing, graph computing, etc. The existing architecture research is designed for different application modes, and it is not effective to find out the essence of communication. Based on the key-value-pair communication model, it is possible to express both the computing and storage of different application modes. It can also analyze and reconstruct the network routing and topology to optimize the communication overhead. System designers and application developers can follow the communication mode for communication system design, optimization and performance analysis.
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